During the RAPIDO workshop some relevant personalities of our community will held a keynote.
Abstract Resource sharing and interferences of multiple threads of one, but even worse between multiple application programs running concurrently on a Multi-Processor System-on-a-Chip (MPSoC) today make it very hard to provide any timing or throughput-critical applications with time bounds. Additional interferences result from the interaction of OS functions such as thread multiplexing and scheduling as well as complex resource (e.g., cache) reservation protocols used heavily today. Finally, dynamic power and temperature management on a chip might also throttle down processor speed at arbitrary times leading to additional varations and jitter in execution time. This may be intolerable for many safety-critical applications such as medical imaging or automotive driver assistance systems. Static solutions to provide the required isolation by allocating distinct resources to safety-critical applications may not be feasible for reasons of cost and due to the lack of efficiency and unflexibility. In this keynote, we first review definitions of predictability. We distinguish two techniques for improving predictability called restriction and isolation and present new definitions for predictability. Subsequently, new techniques for adaptive isolation of resources including processor, I/O, memory as well as communication resources on demand on an MPSoC are introduced based on the paradigm of Invasive Computing. In Invasive Computing, a programmer may specify bounds on the execution quality of a program or even segment of a program followed by an invade command that returns a constellation of exclusive resources called a claim that is subsequently used in a by-default non-shared way until being released again by the invader. Through this principle, it becomes possible to isolate applications automatically and in an on-demand manner. In invasive computing, isolation is supported on all levels of hardware and software including an invasive OS. Together with restriction (of input uncertainty), the level of on-demand predictability of program execution qualities may be fundamentally increased. For a broad class of streaming applications, and a particular demonstration based on a complex object detection application algorithm chain taken from robot vision, we show how jitter-minimized implementations become possible, even for statically unknown arrivals of other concurrent applications.
Abstract Energy efficient design is critical to the success of many electronic products, most notably for mobile and IoT devices. However, implementing low power design techniques and power management strategies always requires tradeoffs around performance, area, design effort, cost and risk. Taking the right decisions requires Hardware and Software teams to jointly consider low-power aspects throughout the development process from specification to implementation. Power-aware virtual prototypes are a promising approach to enable the analysis of energy related trade-off during architecture specification and SW development. To promote the availability of the required high-level power models, a consortium of EDA, IP, semiconductor, and system companies has collaborated to extend the IEEE 1801 UPF standard. This presentation will first review challenges and use cases in energy aware system design based on industry examples and then give an overview of the new concepts in the IEEE 1801-2015 "UPF 3.0" standard to support the definition of system-level power models.
Abstract Modern SoC development is an increasingly complex endeavour as it seeks to satisfy ever stringent requirements in terms of performance, power and area. Add to this time to market pressures, reliability and cost issues, and the problem is getting worse. This talk by Dr. Khaled Benkrid presents a number of modern techniques and tools from the ARM eco-system which mitigate this complexity. This is illustrated through a number of real world case studies.
Abstract Smart embedded systems are the new generation of embedded systems with advanced capability in communication and interaction with the physical environment. Virtual platforms proved to speed-up embedded system design by parallelizing software and hardware development. This talk will give insights into which changes to expect in new virtual platforms regarding analog-mixed-signal modeling, simulation of extra-functional properties and network simulation.