During the RAPIDO workshop some relevant personalities of our community will held a keynote.
Abstract The move to high performance many-cores architectures requires organized high-speed communication between processors. Silicon photonic interconnects are emerging as potential contenders to solve congestion and latency issues in future computing architectures. However, the design of such highly heterogeneous system requires complex design space exploration taking into account thermal sensitivity of optical devices, BER requirements and energy/performances objectives. In this talk, I will introduce key design flow features to optimize the execution of applications onto nanophotonic interconnect based 3D MPSoC.
Sébastien Le Beux is Associate Professor for Heterogeneous and Nanoelectronics Systems Design at Ecole Centrale de Lyon. He is currently responsible for nanoprocessors research activities at the Heterogeneous System Design group of the Lyon Institute of Nanotechnology. He obtained his PhD in Computer Science from the University of Sciences and Technology of Lille in 2007. He went on to become a postdoctoral researcher at Ecole Polytechnique de Montréal, Canada 2008-2010. In 2013, he was invited to the University of Science and Technology Hong Kong as visiting scholar. His research interests include design methods for emerging (nano)technologies and embedded systems, including silicon photonic interconnect and reconfigurable architectures. He has authored or co-authored over 70 scientific publications including journal articles, book chapters, patent and conference papers and held pivotal positions in the organization of various international conferences. He is a general chair of the OPTICS workshop.
Abstracti The presentation addresses the increasing complexity of software design for embedded multiprocessor real-time systems by proposing a correct-by-construction design methodology. The foundations of this method are a formal modelling framework based on the theory of models of computation and predictable multiprocessor platforms that can provide guaranteed quality of service. The ForSyDe (Formal System Design) methodology provides the designer with modelling libraries for the development of executable and analysable system models. The subsequent design space exploration and synthesis process uses the rich set of existing model of computation theory together with platform service guarantees to yield an efficient implementation on a multiprocessor system-on-chip.
Ingo Sander received the MSc degree in Electrical Engineering from the Technical University of Braunschweig, Germany, in 1990 and the PhD degree and docent degree from KTH Royal Institute of Technology, Sweden, in 2003 and 2009, respectively. Between 1991 and 1993 he has worked as system design engineer at Ericsson, Sweden. In 1993 he joined KTH, where he since 2005 holds a position as associate professor in Electronic System Design. His main research interests are located in the area of design methodologies for embedded systems. His current research is aiming towards predictable performance of mixed-criticality applications on multi-processor platforms by integration of formal models into the design flow.