Schedule

Session 1: 10.05 - 11.00

10.05
Welcome and introduction by the workshop organizers

10.10
INVITED TALK: Bringing Light to 3D Architectures
Sebastien Le Beux.

Coffee Break 11.00 - 11.30

Session 2: 11.30 - 12.55

11.30
INVITED TALK: Correct-by-Construction Design of Embedded Real-Time Multiprocessor Applications
Ingo Sander, KTH

12.15
Throughput Propagation in Constraint-Based Design Space Exploration for Mixed-Criticality Systems
Kathrin Rosvall, Nima Khalilzad, George Ungureanu and Ingo Sander.

12.35
Early Stage Interference Checking for Automatic Design Space Exploration of Mixed Critical Systems
Emanuele Vitali and Gianluca Palermo.

Lunch Break 13.00 - 14.00

Session 3: 14.00 - 15.25

14.00
Adaptive Cache Warming for Faster Simulations
Gustaf Borgström, Andreas Sembrant and David Black-Schaffer.

14.20
Accelerating MPSoC Simulation Using Parallel SystemC and Processor Sleep Models
Jan Henrik Weinstock, Rainer Leupers and Gerd Ascheid.

14.40
A Bank-Wise DRAM Power Model for System Simulations
Deepak M. Mathew, Eder F. Zulian, Subash Kannoth, Matthias Jung, Christian Weis and Norbert Wehn.

15.00
Towards State-Based RT Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication
Ralf Stemmer, Maher Fakih, Kim Gruettner and Wolfgang Nebel

15.00
Closing and Best Paper Award